Prof. Vazgen Melikyan

Advisor

Biography

Doctor of Science, Professor Vazgen Shavarsh Melikyan is a Corresponding Member of National Academy of Sciences of the Republic of Armenia since 2014. He earned the academic rank of Professor in Automated Systems from SEUA, Armenia, in 2006, and was awarded a doctoral degree in technical sciences.

Professor Melikyan, honorable scientist of the Republic of Armenia, heads Synopsys Armenia Educational Department (SAED) since its establishment in 2004. Synopsys, Inc., a world leader in software and IP for semiconductor design and manufacturing, has joined effort with State Engineering University of Armenia (SEUA) to run what can be called a powerhouse university. Professor Melikyan oversees smooth implementation of the project that is aimed at training highly skilled and competitive IT specialists for semiconductor industry. As recently as 2016, he received the highest award - the Gold Medal of the Ministry of Education and Science of Armenia - for the greatest contribution to the field of education and science.

Professor Melikyan has also been serving as Head of “Microelectronic Circuits and Systems” Chair of European Regional Educational Academy since its foundation in 2011. Since 2001, he heads Microelectronic Circuits and Systems Interfaculty Chair of State Engineering University of Armenia (SEUA), Armenia. Prior to that, Professor Melikyan served as Director of Educational Department at LEDA Design Inc., Armenia. and as Vice Director of Graduate School, SEUA, Armenia.

He has over 245 publications in his field.

Professor Melikyan has an outstanding academic, project management, and research track record covering an extensive list of IT areas from IP and platform based design and interconnect and package modeling and extraction to logic synthesis and circuit optimization. He is an expert in semiconductor technology with over 40 years and has 20 implemented projects under his belt. His unique experience blend and drive for excellence guides us in the selection and design of software and hardware solutions for PrepayWay.

Publications

2015

Integrated Power Converter with Digital Feedback Control

With Galstyan V.A. Proceedings of Electronics 2015, Moscow, 2015.–P. 28-29 (in Russian)

2015

Fast Interactive Information Retrieval by Sample-Based Multidimensional Scaling on GPU Architectures

With Osipyan H.A. RA National Academy of Science and NPUA, Yerevan, Armenia, Vol. 68, No. 1, Yerevan, 2015.-P. 82-88 (in Armenian)

2015

Accurate Reference Current Generation Method and Circuit in CMOS

With Mkrtchyan E., Martirosyan A., Babayan D., Asatryan A., Melikyan N. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’15), Batumi, Georgia, 2015.-P. 51-54 (in English)

2015

Clock Gating and Multi-VTH Low Power Design Methods Based on 32/28 nm ORCA Processor

With Babayan D., Babayan E., Petrosyan P., Melikyan A., Mkrtchyan E. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’15), Batumi, Georgia, 2015.-P. 47-50 (in English)

2015

Low Power Duty Cycle Adjustment Simple Method in High Speed Serial Links

With Sahakyan A., Hekimyan A., Trdatyan D., Shishmanyan A., Khazhakyan T. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’15), Batumi, Georgia, 2015.-P. 43-46 (in English)

2015

Fully Integrated Low Power Temperature Measurement Circuit Design in 28nm Process

With Durgaryan A., Balabanyan A. Annual Journal of Electronics, Vol.9, ISSN 1314-0078 Sofia, 2015.-P. 182-185 (in English)

2015

Design of High-Efficiency Dual-Ratio Step-Down Switched Capacitor Converter with Full Digital Feedback Control

With Galstyan V. Annual Journal of Electronics, Vol.9, ISSN 1314-0078 Sofia, 2015.-P. 178-181 (in English)

2015

32/28nm Low Power Orca Processor with Multi-Voltage Supply

With Babayan D., Babayan E., Petrosyan P., Melkonyan V., Manukyan H., Manukyan A. Proceedings of the 10th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2015.-P. 123-127 (in English)

2015

Physical Design Methods of Microelectronic Circuits

With Harutyunyan A., Gevorgyan A. Yerevan, Chartaraget, 2015 (in Armenian)

2015

Low-Power and High Speed High-to-Low Level Shifter

With Aleksanyan A.L., Galstyan V.A., Manukyan S.H., Harutyunyan A.S. Proceedings of the 2nd International Conference on Electrical, Electronic and Computing Engineering IcETRAN 2015, Silver Lake (Srebrno Jezero), Serbia, June 8 – 11, 2015, pp. ELI1.6

2015

Adjustable Low-Power Non-Overlap Clock Generator for Switched-Capacitor Circuits

With Galstyan V.A., Aleksanyan A.L., Melikyan N.V., Borisav J. Proceedings of the 2nd International Conference on Electrical, Electronic and Computing Engineering IcETRAN 2015, Silver Lake (Srebrno Jezero), Serbia, June 8 – 11, 2015, pp. ELI1.5 (in English)

2015

Multi-Rate Clock-Data Recovery Solution in High Speed Serial Links

With Sahakyan A., Shishmanyan A., Hekimyan A. Proceedings of the 2015 IEEE 35th International Conference on Electronics and Nanotechnology (ELNANO), Kiev, Ukraine, April 21-24, 2015.-P. 242-244 (in English)

2015

Design of High-Efficiency Digital-Control Multi-Topology Step-Down Switched Capacitor Converter

With Galstyan V.A. Proceedings of the 2015 IEEE 35th International Conference on Electronics and Nanotechnology (ELNANO), Kiev, Ukraine, April 21-24, 2015.-P. 42-45 (in English)

2015

Method to Decrease Random Statistical Fluctuations of Resistor and Capacitor in Analog Integrated Circuits Layout

With Kasarjyan H.G. Proceedings of Engineering Academy of Armenia. Vol. 12. No. 1, Yerevan, 2015.-P. 125-129 (in Armenian)

2014

Synopsys' Educational Generic Memory Compiler

With Goldman R., Bartleson K., Wood T., Babayan E. Proceedings of the 10th European Workshop on Microelectronics Education (EWME 2014), Tallinn, Estonia, 2014.-P. 89-92 (in English)

2014

Challenges and Solutions of IC Design Using FinFET Transistors

Proceedings of Engineering Academy of Armenia. Jubilee Publication; Vol. 11. No. 4, Yerevan, 2014.-P. 91-97 (in English)

2014

Quantum Data Model Description of Digital Systems

With Baghdadi А.А., Hahanov V., Chumachenko S. Proceedings of Engineering Academy of Armenia. Vol. 11, No. 1, Yerevan, 2014.-P. 122-128 (in Russian)

2014

High Accuracy Self-Configurable DLL by Frequency Range

With Sahakyan A., Piloyan M., Jovanović B. Proceedings of 1st International Conference on Electrical, Electronic and Computing Engineering IcETRAN 2014, Vrnjačka Banja, Serbia, June 2 – 5, 2014, pp. ELI1.4.1-4.- ISBN 978-86-80509-70-9

2014

Resistance Calibration Method Without External Precision Elements

With Sahakyan A., Piloyan M., Shishmanyan A., Hovhannisyan T., Trdatyan D. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’14), Kiev, Ukraine, 2014.-P. 24-27 (in English)

2014

Design of Low-Ripple Multi-Topology Step-Down Switched Capacitor Power Converter with Adaptive Control System

With Galstyan V. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’14), Kiev, Ukraine, 2014.-P. 20-23 (in English)

2014

Modified Fast PCA Algorithm on GPU Architecture

With Osipyan H. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’14), Kiev, Ukraine, 2014.-P. 16-19 (in English)

2014

Integrated Step Up/Down Power Converter with Dynamic Control of Clock Frequency

With Galstyan V., Aleksanyan A., Harutyunyan G. Proceedings of the 6th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems 2014” (MES-2014), Moscow, Russia, 2014.-P. 63-67 (in Russian)

2014

Quantum Modeling and Testing of Digital Units

With Baghdadi A.A., Hahanov V.I., Litvinova E.I. Manual of SEUA “Information Technologies, Electronics and Radio Engineering”. Vol. 17, No. 1, Yerevan, 2014.-P. 9-20 (in English)

2014

Pull-Up/Pull‐Down Line Impedance Matching Methodology for High Speed Transmitters

With Durgaryan A., Balabanyan A., Abugharbieh Kh. Proceedings of the IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2014), Austin, Texas, USA, May 28-30, 2014.-P. 978-1-4799-2153-9/14 (in English)

2014

Self-Calibration Method for Input/Output Termination Resistance Variation Elimination

With Aleksanyan Ani L., Galstyan Vache A., Harutyunyan Ani S. Proceedings of the 2014 IEEE 34th International Scientific Conference Electronics and Nanotechnology (ELNANO), Kiev, Ukraine, April 15-18, 2014.-P. 126-130 (in English)

2014

High PSRR and Accuracy Receiver Active Equalizer

With Sahakyan Arthur S., Dingchyan Hayk H., Melikyan Nazeli V., Aleksanyan Ani L., Sahakyan Armen S., Babayan Vahe S. Proceedings of the 2014 IEEE 34th International Scientific Conference Electronics and Nanotechnology (ELNANO), Kiev, Ukraine, April 15-18, 2014.-P. 194-197 (in English)

2014

IC Design Course Based on the Synopsys DesignWare ARC 600 Processor Core and 32/28nm Educational Design Kit

With Goldman R., Bartleson K., Wood T., Watson A., Babayan E., Hakhverdyan T. Proceedings of the Fourth Interdisciplinary Engineering Design Education (IEDEC 2014) Conference, Santa Clara, CA, USA, March 3, 2014.-P. 66-69 (in English)

2014

Physical Design Implementation

With Harutyunyan A., Matevosyan A., Chobanyan S., Shahinyan T., Babayan E. Chartaraget, Yerevan, 2014 (in English)

2014

The Correlated Level Shifting as a Gain Enhancement Technique for Comparator Based Integrators

With Dingchyan H., Hayrapetyan A., Sahakyan A., Grigoryants V., Babayan V., Martirosyan A. Proceedings of the 5th Small Systems Simulation Symposium 2014, Niš, Serbia, February 12-14, 2014.-P. 20-23 (in English)

2014

High PSRR Gain-Boosted Rail-To-Rail OTA

With Sahakyan A., Poghosyan S., Sahakyan A., Babayan V. Proceedings of the 5th Small Systems Simulation Symposium 2014, Niš, Serbia, February 12-14, 2014.-P. 16-19 (in English)

2013

32/28nm Educational Design Kit: Capabilities, Deployment and Future

With Goldman R., Bartleson K., Wood T., Kranen K., Babayan E. Proceedings of the Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia 2013), India, Visakhapatnam, December 19-21, 2013.-P. 284-288 (in English)

2013

A New Approach of USB HW/SW Co-simulation and Verification

With Zargaryan G., Aharonyan V., Melikyan N., Dimitrijević M. Proceedings of the 57th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Zlatibor, Serbia, June 3-6, 2013.-P.EL1.8.1-5 (in English)

2013

Serializer/Deserializer Output Data Signal Duty Cycle Correction Method

With Sahakyan A., Hayrapetyan A., Balabanyan A., Stanojlović M., Zargaryan G. Proceedings of the 57th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Zlatibor, Serbia, June 3-6, 2013.-P. EL3.4.1-4 (in English)

2013

PVT Variation Detection and Compensation Methods for High-Speed Systems

With Balabanyan A., Durgaryan A., Stepanyan H., Sloyan K., Musayelyan H., Markosyan G. Proceedings of 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Novotel, Istanbul, Turkey, October 7-9, 2013.-P. 350-355 (in English)

2013

High Accuracy Equalization Method for Receiver Active Equalizer

With Sahakyan A., Safaryan K., Dingchyan H. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’13), Rostov-on-Don, Russia, 2013.-P. 390-393 (in English)

2013

Low-Voltage Compatible Linear Voltage Ramp Generator for Zero-Crossing-Based Integrators

With Dingchyan H., Sahakyan A., Grigoryants V., Safaryan K. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’13), Rostov-on-Don, Russia, 2013.-P. 386-389 (in English)

2013

Self-Calibration Method for Capacitor Mismatch Elimination

With Stepanyan H., Aleksanyan A., Harutyunyan A., Durgaryan A. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’13), Rostov-on-Don, Russia, 2013.-P. 378-381 (in English)

2013

Noise Effect Estimation and Reduction in High-Speed Voltage Controlled Oscillators

With Balabanyan A., Durgaryan A. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’13), Rostov-on-Don, Russia, 2013.-P. 19-22 (in English)

2013

Data-Clock Setup and Hold Times Margins Correction Method in High Speed Serial Links

With Sahakyan A., Shishmanyan A., Melikyan N., Zargaryan G. roceedings of the Computer Science and Information Technologies Conference (CSIT), Yerevan, Armenia, 2013.-P. 356-359 (in English)

2013

NMOS/PMOS Resistance Calibration Method Using Reference Frequency

With Balabanyan A., Durgaryan A., Hayrapetyan A. Proceedings of the Computer Science and Information Technologies Conference (CSIT), Yerevan, Armenia, 2013.-P. 352-355 (in English)

2013

System-Level IC Design

With Harutyunyan A., Poghosyan A. Yerevan, Chartaraget, 2013.-P 240 (in Armenian)

2013

Low Power Digital Standard Cell Library Development Methodology

Manual of SEUA “Information Technologies, Electronics and Radio Engineering”. Vol. 16, No. 1, Yerevan, 2013.-P. 96-102 (in English)

2013

Green Wave – Cloud Monitoring and Traffic on Cloud

With Hahanov V.I., Shakhov D.V., Saatchyan A.G. Manual of SEUA “Information Technologies, Electronics and Radio Engineering”. Vol. 16, No. 1, Yerevan, 2013.-P. 53-60 (in Russian)

2013

Comparison of Gate Delay Measurements Implemented via HSpice and PrimeTime Tools

With Sloyan K. Proceedings of 14th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Ukraine, 2013.-P. 311-313 (in English)

2013

Receiver/Transmitter Input/Output Termination Resistance Calibration Method

With Balabanyan A., Hayrapetyan A., Melikyan N. Proceedings of the 2013 IEEE XXXIII International Scientific Conference Electronics and Nanotechnology (ELNANO), Kiev, Ukraine, 2013.-P. 126-130 (in English)

2013

Systems Design Optimization on Graphics Processing Unit

With Osipyan H.A. Proceedings of the 9th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2013.-P. 169-171 (in English)

2013

CMOS I/O Driver with Die Process, Voltage, Temperature Variation Compensation

With Movsisyan K.W. Proceedings of the 9th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2013.-P. 165-168 (in English)

2013

Models of Electrostatic Discharge Protection Devices Considering the Self-Heating Effects

With Khachatryan A.N., Mirzoyan D.L., Durgaryan A.A. RA National Academy of Science and SEUA, Yerevan, Vol. 66, No. 1, Yerevan, 2013.-P. 73-83 (in Armenian)

2013

State Engineering University of Armenia (Polytechnic)-Synopsys Cooperation as Successful Example

With Roldman R., Bartleson K., Wood T., Avetisyan A., Aghgashyan R., Musayelyan H., Markosyan G. Proceedings of the University/Industry Cooperation-Accelerating Innovation Scientific-Educational Conference, Yerevan, Armenia, May 15, 2013.-P. 59-61 (in Armenian and English)

2013

Teaching IC Design with the ARM Cortex-M0 DesignStart Processor and Synopsys 90nm Educational Design Kit

With D. Flynn, T. Wood, Ph. Dworsky, E. Babayan Proceedings of the Interdisciplinary Engineering Design Education (IEDEC) Conference, Santa Clara, CA, USA, March 4-5, 2013.-P. 36-38 (in English)

2013

Low Power Design Flow Based on Unified Power Format and Synopsys Tool Chain

With V. Gourisetty, H. Mahmoodi, E. Babayan, R. Goldman, K. Holcomb, T. Wood Proceedings of the Interdisciplinary Engineering Design Education (IEDEC) Conference, Santa Clara, CA, USA, March 4-5, 2013.-P. 28-31 (in English)

2012

Modeling and Design of Power Supply Network of an IC High Speed I/O Interface

With Movsisyan K. RA National Academy of Science and SEUA, Yerevan, Vol. 65, No. 4, Yerevan, 2012.-P. 380-390 (in English)

2012

Power Consumption Estimation of CMOS Digital Circuits Based on Logic Simulation of Their Structural Descriptions

With Bibilo P.N., Solovev A.L., Harutyunyan A.G., Babayan E.H. Proceedings of Engineering Academy of Armenia. Vol. 9, No. 3, Yerevan, 2012.-P. 600-610 (in Russian)

2012

Process-Voltage-Temperature Variation Detection and Cancellation Using On-Chip Phase-Locked Loop

With Durgaryan A.A., Balabanyan A.H., Babayan E.H., Stanojlovic M., Harutyunyan A.G. Proceedings of the 56th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Zlatibor, Serbia, 2012.-P. EL1.2-1-4 (in English)

2012

On-Die CMOS Termination Resistor for USB Transmitter

With Gavrilov S.V., Aharonyan V.K., Aslanyan N.K., Hovhannisyan A.S. RA National Academy of Science and SEUA, Yerevan, Vol. 65, No. 3, Yerevan, 2012.-P. 295-304 (in English)

2012

Method of Reducing Thermal Dependence of Timing Delays of Digital Integrated Circuits

With Babayan E., Harutyunyan A., Melikyan N., Zargaryan G. Proceedings of the 5th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems 2012” (MES-2012), Moscow, Russia, 2012.-P. 409-412 (in Russian)

2012

Self-Compensating Low Noise Low Power PLL Design

With Durgaryan A., Khachatryan A., Manukyan H., Musayelyan E. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’12), Kharkov, Ukraine, 2012.-P. 29-33 (in English)

2012

Low Power IC Design

With Harutyunyan A., Matevosyan A., Petrosyan H. Chartaraget, Yerevan, 2012 (in Armenian)

2012

Modeling of IC Interconnects and Power Rails

With Harutyunyan A. Chartaraget, Yerevan, 2012 (in Armenian)

2012

Pattern-Based Approach to Current Density Verification

With Babayan E., Harutyunyan A. Electronics, Faculty of Electrical Engineering, University of Banja Luka, V. 16, No. 1, Serbia, 2012.-P. 77-82 (in English)

2012

Experience of Low Power Design Teaching

With Roldman R., Bartleson K., Wood T., Babayan E., Khazhakyan T. Proceedings of the 9th European Workshop on Microelectronics Education (EWME 2012), Grenoble, France, 2012.-P. 141-144 (in English)

2012

Synopsys’ Low Power Design Educational Platform

With Roldman R., Bartleson K., Wood T., Babayan E. Proceedings of the 9th European Workshop on Microelectronics Education (EWME 2012), Grenoble, France, 2012.-P. 23-26 (in English)

2012

Decreasing of Frequency Variation in High-Speed Ring Oscillator Using Bandgap Reference

With Balabanyan A., Babayan E., Durgaryan A. Proceedings of the 32th International Scientific Conference Electronics and Nanotechnology (ELNANO 2012), Kiev, Ukraine, 2012.-P. 79-81(in English)

2012

Thermal Via’s Placement Zones Identifying Using Voronoi Diagrams

With Gevorgyan A., Baghdasaryan A., Melikyan H. Proceedings of the 32th International Scientific Conference Electronics and Nanotechnology (ELNANO 2012), Kiev, Ukraine, 2012.-P. 77-79 (in English)

2012

Student Working Groups: An Effective Form of Improving Microelectronics Education Quality

With Roldman R., Bartleson K., Wood T., Kranen K., Babayan E. Proceedings of Interdisciplinary Engineering Design Education (IEDEC) conference, Santa Clara, CA, USA, 2012.-P. 88-91(in English)

2012

Investigating the Effects of Inverted Temperature Dependence (ITD) on Clock Distribution Networks

With Sassone A., Calimera A., Macii A., Macii E., Poncino M., Goldman R., Babayan E., Rinaudo S. Proceedings of Design, Automation & Test in Europe (DATE’12) conference, Dresden, Germany, 2012.-P. 165-167 (in English)

2012

Pattern-Based Approach to Current Density Verification

With Babayan E., Harutyunyan A. Proceedings of the 4th Small Systems Simulation Symposium 2012, Nis, Serbia, 2012.-P. 58-61 (in English)

2011

Method of Estimating Run Time of Integrated Circuits

Manual of Engineering Academy of Armenia. Vol. 8, No. 4, Yerevan, 2011.-P. 741-745 (in Armenian)

2011

Digital Circuits Verification with Consideration of Destabilizing Factors

With Roldman R., Babayan E. Proceedings of the 6th IEEE International Design and Test Workshop (IDT) in Conjunction with IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, Lebanon, 2011.-P. 93-98 (in English)

2011

Modeling and Optimization Theory of Digital Circuits with Consideration of Destabilizing Factors

Chartaraget, Yerevan, 2011 (in Russian)

2011

Programmable Current Biasing for Low Noise Voltage Controlled Oscillators

With Durgaryan A. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’11), Sevastopol, Ukraine, 2011.-P. 47-50 (in English)

2011

Design Method of Low-Leakage Hybrid 9T-SRAM

With Eminyan N.S., Chobanyan S.G., Beglaryan N.H. Manual of Engineering Academy of Armenia and SEUA. Vol. 64, No. 3, Yerevan, 2011.-P. 265-274 (in English)

2011

Automatic PLL Activation Mechanism from Power Gated State

With Durgaryan A., Petrosyan H., Melikyan N. Proceedings of the 8th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2011.-P. 214-217 (in English)

2011

Method of Electro-Thermal Co-Simulation of Integrated Circuits

With Goldman R., Babayan E. Proceedings of the 8th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2011.-P. 207-213 (in English)

2011

A Fully Differential Phase-Frequency Detector Design for Low Noise Phase Locked Loop Applications

With Durgaryan A., Petrosyan H., Topisirović D. Proceedings of the 55th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Banja Vrućica, Serbia, 2011.-P. EL4.3-1-4 (in English)

2011

New Retention Flop Architecture with Phase Frequency Detection (PFD) Capabilities

With Petrosyan H., Durgaryan A., Topisirović D. Proceedings of the 55th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Banja Vrućica, Serbia, 2011.-P. EL4.2-1-4 (in English)

2011

Method of Parametrical Optimization of Multi-Core Processors

With Poghosyan A., Durgaryan A., Petrosyan H., Simonyan M. Proceedings of the 31st International Scientific-Technical Conference on “Electronics and Nanotechnologies”, Kiev, Ukraine, 2011.-P. 126-130 (in Russian)

2011

Power Efficient, Low Noise 2-5GHz Phase Locked Loop

With Durgaryan A., Petrosyan H., Stepanyan A. Proceedings of the 31st International Scientific-Technical Conference on “Electronics and Nanotechnologies”, Kiev, Ukraine, 2011.-P. 66-71 (in English)

2010

Integrated Circuits – Perspective Ways of Thermal Removal

In the World of Science, No. 4, Yerevan, 2010.-P. 55-59 (in Armenian)

2010

Method of Forming Stable Current and Voltage in Integrated Circuits

Proceedings of International Conference on Computer-Aided Design of Discrete Devices (CAD’10), Minsk, Belarus, 2010.-P. 358-363 (in English)

2010

Development of Industry/University Cooperation Model on the Example of Synopsys Armenia Educational Department

With Grigoryan A. Proceedings of International Conference on “State and Perspectives of Development of Professional Training and Increase of Qualification of Specialists in State Participants of CIS Towards New Directions of Developing Techniques and Technologies, Moscow, 2010.-P. 75-78 (in Russian)

2010

An Algorithm to Define Transistor Sizes, Based on Statistical Static Timing Analysis

With Mirzoyan D., Petrosyan H., Aharonyan V. Proceedings of the 4th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems 2010” (MES-2010), Moscow, 2010.-P. 114-119 (in Russian)

2010

A Method to Define the Efficiency of Dynamic Scaling of Supply Voltage and Frequency of Multicore Processors

With Abovyan S., Petrosyan H., Grigoryan D. Proceedings of the 4th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems 2010” (MES-2010), Moscow, 2010.-P. 353-355 (in Russian)

2010

Methodology of Creating Standard Digital Cell Libraries for SoC Design with Low Power

Proceedings of SoC Design: Development Trends and Problems International scientific-technical conference, Zelenograd, Russia, October 19-21, 2010.-P. 29 (in Russian)

2010

Stable Current and Voltage Generation under Process Variation

With Mirzoyan D., Karapetyan Sh., Babayan E. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’10), St. Petersburg, Russia, 2010.-P. 40-42 (in English)

2010

A Process Variation Detection Method

With Mirzoyan D., Petrosyan G. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’10), St. Petersburg, Russia, 2010.-P. 30-33 (in English)

2010

Tuning Methods for Charac­terizing Complicated Function­ality Circuits

With Mirkovic D.D., Petrosyan H. P., Musayelyan E.H., Stepanyan A.G., Beglaryan N.E. Proceedings of the 54th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Donji Milanovac, Serbia, 2010.-P. EL2.4-1-4 (in English)

2010

A Method to Register Technological Deviations Using MOS Transistors

With Mirzoyan D.L., Khachatryan A.N., Sargsyan A.G., Grigoryan D.Kh., Musayelyan E.H. RA National Academy of Science and SEUA, Yerevan, Vol. 63, No. 2, Yerevan, 2010.-P. 170-180 (in Armenian)

2010

Synopsys’ Interoperable Process Design Kit

With Goldman R., Bartleson K. Wood T. Proceedings of 8th European Workshop on Microelectronics Education, Darmstadt, Germany, May 10-12, 2010.-pp. 119-121

2010

Statistical Analysis of Timing Delays of Multi-Processor Systems

With Petrosyan G., Abovyan S., Shahbazyan L., Stepanyan H., Musayelyan E. Electronica i Svyaz. Vol. 5, 2010.-P. 108-112 (in Russian)

2010

Analysis of VTH Hopping Power Consumption Method

With Melikyan H., Petrosyan H. Electronica i Svyaz. Vol. 4, 2010.-P. 88-90 (in English)

2010

Energy-Saving of Electronic Devices Connected to Universal Sequential Bus

With Aharonyan V., Beglaryan H. Electronica i Svyaz. Vol. 3, 2010.-P. 86-90 (in Russian)

2009

Synopsys' Open Educational Design Kit: Capabilities, Deployment and Future

With Goldman R., Bartleson K., Wood T., Kranen K., Cao C., Markosyan G. Microelectronic Systems Education, 2009. MSE '09. IEEE International Conference on DOI: 10.1109/MSE.2009.5270840, 2009.-P. 20-24 (in English)

2009

Fuzzy FSM of Brauer of Combinational Digital Devices with Statistical and Dynamic Criteria Parameters

With Grigoryan D., Stepanyan A., Melikyan H. Simulation, Optimization, Control. SEUA, Yerevan, No. 12, Vol. 2, Yerevan, 2009.-P. 59-65 (in Russian)

2009

Design of Lock Detector with Stable Parameters

With Hovsepyan A., Ishkhanyan M., Hakobyan T., Harutyunyan G. Proceedings of 4th International Workshop for Design & Test, Riyadh, Saudi Arabia, 2009.-P. 10-13 (in English)

2009

The SEUA and Synopsys Armenia Success Story

With Aghgashyan R. Proceedings of Armenian Technology Congress (ArmTech’09), San Jose, CA, USA, 2009.-P. 104-106 (in English)

2009

Student Working Groups: A New Form of Improving Microelectronics Education Quality

With Goldman R., Bartleson K., Wood T., Musayelyan H., Markosyan G. Proceedings of Armenian Technology Congress (ArmTech’09), San Jose, CA, USA, 2009.-P. 67-72 (in English)

2009

An Effective Model of Industry/University Partnership

Goldman R., Bartleson K., Wood T., Musayelyan H., Markosyan G. Proceedings of the 8th ASEE Global Colloquium on Engineering Education, Budapest, Hungary, 2009.-P. 74-77 (in English)

2009

Self-Calibration Technique of Capacitor’s Mismatching for 1.5 Bit Stage Pipeline ADC

With Stepanyan H. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’09), Moscow, Russia, 2009.-P. 84-86 (in English)

2009

Schematic Protection Method from Influence of Total Ionization Dose Effects on Threshold Voltage of MOS Transistors

With Hovsepyan A., Harutyunyan T. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’09), Moscow, Russia, 2009.-P. 260-262 (in English)

2009

5V Tolerant Power Clamps for Mixed-Voltage IC’s in 65nm 2.5V Salicided CMOS Technology

With Sahakyan K., Nazaryan A. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’09), Moscow, Russia, 2009.-P. 263-266 (in English)

2009

A New Microelectronics Curriculum Created by Synopsys, Inc.

With Goldman R., Bartleson K., Wood T., Wang Z., Lan C. Journal US-China Education Review, Vol.6, Num.5, May 2009, (Serial Number 14), Illinois, USA.-P. 45-50 (in English)

2009

Development of Resistor-Transistor Matrix for Nodes of Termination of Wave Resistances of ICs

With Shaghgamyan D.A. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 12, No. 1, Yerevan, 2009.-P. 70-75 (in Russian)

2009

Integrated Circuits: “Saving” Way of Moore’s Law

In Science World, No. 4, Yerevan, 2009.-P. 55-62 (in Armenian)

2009

Design Automation Method for Total Ionization Dose Tolerant Integrated Circuits

With Hovsepyan A., Vardanyan K. Annual Journal of Electronics, Vol. 2, No. 2, Sofia, 2009.-P. 95-96 (in English)

2009

Time Reduction Method of Phased Lock Loop (PLL)

With Ishkhanyan M.N., Hovsepyan A.A., Sargsyan A.G., Mirzoyan D.L, Khachatryan A.N. RA National Academy of Science and SEUA, Vol. 62, No. 2, Yerevan, 2009.-P. 218-223 (in Armenian)

2009

Voltage Overstress Protection Techniques in CMOS 1.8V to 3.3 Low-to-High Level Shifter Based on 1.8V Technology

With Sargsyan A.G., Hovsepyan A.A., Shafik O.P. Proceedings of the 7th International Conference of “Micro- and Nanoelectronics”, Tsakhkadzor, Armenia, 2009.-P. 222-224 (in English)

2009

SCR ESD Protection Scheme for Triple-well CMOS Technologies

With Khachatryan A., Mirzoyan D. Proceedings of the 7th International Conference of “Micro- and Nanoelectronics”, Tsakhkadzor, Armenia, 2009.-P. 218-221 (in English)

2009

Design Automation Method for Single Event Upset Tolerant Digital Electronics

With Hovsepyan A.A., Makaryan A.A., Alaverdyan R.A., Sargsyan A.G., Sahakyan K.G., Musaelyan E.H. Proceedings of the 7th International Conference of “Micro- and Nanoelectronics”, Tsakhkadzor, Armenia, 2009.-P.215-217 (in English)

2009

Threshold Voltage Extractor Circuit

With Mirzoyan D., Khachatryan A. Proceedings of the 53rd Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Vrnjacka Banja, Serbia, 2009.-P. EL3.3-1-4 (in English)

2009

A Stable Source of Reference Voltage to Temperature and Technological Dispersion

With Mirzoyan D.L., Khachatryan A.N., Melikyan E.V. Elektronica i Svyaz, Vol. 2-3, No 1, 2009.-P.100-105 (in Russian)

2009

Definition of Optimal Number of Cascades of Ultra Wide-band Power Amplifier with Defined Elements Based on Statistical Data

With Sargsyan A.G., Musalyelyan E.O. Elektronica i Svyaz, Vol. 4-5, No. 2, 2009.-P. 104-108 (in Russian)

2009

A Method of Eliminating False Paths During Statistical Static Analysis of Timing Delays of Digital Circuits

Electronica i Svyaz, Vol. 2-3, No. 1, 2009.-P. 93-96 (in Russian)

2009

Statistical Static Timing Analysis of Digital Circuits with Consideration of Interconnects Delays

Proceedings of the 10th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Ukraine, 2009.-P. 87 (in Russian)

2009

Full-Custom Design Project for Digital VLSI and IC Design Courses using Generic 90nm CMOS Library

With Lyons E., Ganti V., Goldman R., Mahmoodi H. Proceedings of International Conference on Microelectronic Systems Education, San Francisco, USA, 2009.-P. 45-48 (in English)

2009

Synopsys Open Edu­cational Design Kit: Capabilities, Deployment and Future

With Goldman R., Bartleson K., Wood T., Kranen. K., Cao C., Markosyan G. Proceedings of International Conference on Microelectronic Systems Education, San Francisco, USA, 2009.-P. 20-24 (in English)

2008

Network of Integrated Circuit Design Teaching Centers in Black Sea Region

With Petkovic P., Hristov M. Report of Black Sea Economic Cooperation Project, cipher BSEC/PDF/13/05 2007, Nis, Serbia, 2008 (in English)

2008

Modeling of the Influence of Total Ionization Dose (TID) Effects on Threshold Voltage of MOS Transistors

With Hovsepyan A., Sahakyan K. Radioelectronics, electronics and power engineering”, Moscow, 2008, Vol 1.-P. 229-230 (in Russian)

2008

An Experience of Applying Semiconductor Design Curri­culum

With Goldman R., Bartleson K., Wood T. Proceedings of Armtech’08 Congress, Yerevan, 2008.-P. 25-30 (in English)

2008

Optimization of Power Consumption on SoC

With Martirosyan A.G., Mkrtchyan K.G., Melikyan E.V., Soghomonyan D.S., Petrosyan T.A. Elektronica i Svyaz, Vol. 3-4, No.1, Kiev, 2008.-P. 13-17 (in Russian)

2008

Calibration Technique for High-speed High Resolution Pipelined ADC

With Kocharyan A.Y. Electronica i Svyaz, Vol. 1-2, No. 1, Kiev, 2008.-P. 231-233 (in Russian)

2008

An Optimization Method of Digital Circuits Based on Geometrical Programming

Proceedings of the 9th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Vol. 2, 2008.-P. 23 (in Russian)

2008

An Experience of Indus­try/University Collaboration in Microelectronics Education

With Musayelyan H., Markosyan G., Bartleson K., Wood T., Goldman R. Proceedings of the 7th European Workshop on Microelectronics Education, Budapest, Hungary, 2008.-P. 148-149 (in English)

2008

A New Curricula Oriented at 90nm and Below Technologies

With Bartleson K., Wood T., Goldman R. Proceedings of the 7th European Workshop on Microelectronics Education, Budapest, Hungary, 2008.-P. 124-125 (in English)

2008

Modeling of the Influence of Total Ionization Dose (TID) Effects on Threshold Voltage of MOS Transistors

With Hovsepyan A.A., Sahakyan K.G. Proceedings of 14th International scientific-technical conference of students and PhDs “Radioelectronics, electronics and power engineering”, Moscow, Russia, 2008, Vol. 1.-P. 229-230 (in Russian)

2008

Lock Detector with Stable Parameters

With Hovsepyan A., Ishkhanyan M., Hakobyan T., Harutyunyan G. Proceedings of the 52nd ETRAN Conference, Palic, Igalo, 2008.-P. ME1.8-1-3 (in English)

2008

The Design of a Code-controlled Resistance Matrix for High-speed I/O Applications

With Shaghgamyan D. Proceedings of the 52nd ETRAN Conference, Palic, Igalo, 2008.-P. EL2.7-1-3 (in English)

2008

A Method of Increasing Extraction Accuracy of Parasitic Capacitances of IC Interconnects

With Mkrtchyan K.G., Melikyan E.V., Badalyan D.R. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 11, No. 1, 2008.-P. 65-71 (in Russian)

2008

A Method of Considering Variations of Transistor Parameters for Timing Analysis of Digital Circuits

Simulation, Optimization, Control. SEUA, Yerevan, Vol. 11, No. 1, Yerevan, 2008.-P. 59-64 (in Russian)

2008

A New Microelectronics Curri­culum Created by Synopsys, Inc.

With Goldman R., Bartleson K., Wood T., Wang Z., Lan. C. International Conference on Science, Technology and Education Policy. Hangzhou, China, 2008.-P. 83-86 (in English)

2008

Digital Lock Detector for PLL

With Hovsepyan A., Ishkhanyan M., Hakobyan T. Proceedings of IEEE East-West Design & Test Symposium (EWDTS’08), Lvov, Ukraine, 2008.-P. 141-142 (in English)

2008

A Method of Calculating Integrated Cells of I/O Cells with Code Adjustment of Nominal Value

With Shaghgamyan D.A. The 3rd All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems-2008” (MES-2008), Moscow, 2008.-P. 374-377 (in Russian)

2008

A Method of ESD Rules Check in VLSI

The 3rd All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems-2008” (MES-2008), Moscow, 2008.-P. 159-164 (in Russian)

2008

Synthesis of Models of Substrates on SoC

With Shahinyan T.H. The 3rd All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems-2008” (MES-2008), Moscow, 2008.-P. 154-158 (in Russian)

2008

Design of High Portable Lock Indicator

With Hovsepyan A. Proceedings of the 17th International Scientific and Applied Science Conference “Electronics” (ET 2008), Sozopol, Sofia, Book 3. 2008.-P. 35-38 (in English)

2007

New Method of RSD Correction in 1.5 Bit Structure Pipeline ADC

With Kocharyan A.Y., Chobanyan S.G., Matevosyan A.V., Martirosyan A.G. RA National Academy of Science and SEUA. Vol. 60, No. 4, Yerevan, 2007.-P. 709-716 (in Armenian)

2007

Synopsys and Higher Education: An Effective Model of Industry/University Partnering for Improving Armenia’s Technology Competitiveness

With Goldman R., Bartleson K., Wood T., Musayelyan H., Markosyan G. Proceedings of Armtech’07 Congress, San Francisco, USA, 2007.-P. 57-61 (in English)

2007

Educating a Nation’s Engineers: A New Paradigm for Indus­try/Academia Cooperation

With Goldman R., Bartleson K., Wood T., Musayelyan H., Markosyan G. Proceedings of Meeting the Growing Demand for Engineers and Their Educators 2010-2020 International Conference, Munich, Germany, 2007.-P. 87-90 (in English)

2007

Method to Realize Joint Transition of Data Flow with Various Priorities in Network on Chip

With Martirosyan A.G., Matevosyan A.V., Chobanyan S.G. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 2, 2007.-P. 72-75 (in Russian)

2007

Method of Reducing Buffer Power Consumption of the Router of Network on Chip

With Matevosyan A., Martirosyan A., Chobanyan S. Proceedings of the 11th International Conference on Computer-Aided Design of Discrete Devices (CAD’07), Minsk, Belarus, 2007.-P. 130-136 (in English)

2007

Building Methodology of Digital Standard Cell Libraries for Low Power Design

With Martirosyan A., Chobanyan S., Matevosyan A. Proceedings of the 51st ETRAN Conference, Herceg Novi - Igalo, 2007.-P. EL1.4-1-3 (in English)

2007

The I/O Output Buffer Auto­mated Design with Conside­ration of Simultaneously Switch­ing Noises

With Petrosyan D., Petrosyan T. Proceedings of the 16th International Scientific and Applied Science Conference (Electronics ET 2007), Sozopol, Sofia, Bulgaria, 2007.-Book 4.-P. 55-58 (in English)

2007

Congestion Control Algorithm for Network on Chip Traffic

With Martirosyan A., Matevosyan A., Chobanyan S. Proceedings of the 16th International Scientific and Applied Science Conference “Electronics” (ET2007), Sozopol, Sofia, Bulgaria, 2007.-Book 4.-P. 82-87 (in English)

2007

A Combinational Method of Extracting RC Model of Substrates of VLSI

With Shahinyan T.H., Baghramyan B.E. RA National Academy of Science and SEUA. Vol. 60, No. 2, Yerevan, 2007.-P. 330-337 (in Armenian)

2007

A Standard CMOS Cell Library with Application of New Styles of Providing Low Power Consumption

With Matevosyan A.V. Proceedings of the 7th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Vol. 2, 2007.-P. 259 (in Russian)

2007

Principles of Selecting Optimal Structure of Sigma-Delta Modulator

With Chobanyan S.G. Proceedings of the 7th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Vol. 2, 2007.-P. 171 (in Russian)

2007

A Design Method of Single Event Upset Tolerant Phase Locked Loop

With Hovsepyan A., Sargsyan A., Harutyunyan G., Ghasabyan R. Proceedings of the 5th IEEE East-West Design & Test Symposium (EWDTS’07), Yerevan, 2007.-P. 479-481 (in English)

2007

The Design of Pulse Width Distortion Controller for High-speed I/O Application

With Movsisyan W., Shaghgamyan D., Petrosyan D., Sahakyan K. Proceedings of the 5th IEEE East-West Design & Test Symposium (EWDTS’07), Yerevan, 2007.-P. 307-311 (in English)

2007

Mechanism for Providing Congestion Free Traffic Flow in Networks on Chip

With Martirosyan A., Matevosyan A., Chobanyan S. Proceedings of the 5th IEEE East-West Design & Test Symposium (EWDTS’07), Yerevan, 2007.-P. 304-306 (in English)

2007

Dynamic Models of Substrate of VLSI

With Shahinyan T.H. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 10, No. 1, 2007.-P. 66-72 (in Russian)

2007

Accurate Statistical Timing Analysis Method of Digital ICs

With Martirosyan A.H., Melikyan H.V.., Petrosyan T.A., Soghomonyan D.S. RA National Academy of Science and SEUA, Vol. 60, No. 1, Yerevan, 2007.-P. 145-151 (in Armenian)

2007

Combinational Method to Reduce Power Consumption of Digital CMOS Circuits

With Matevosyan A.V., Chobanyan S.G., Petrosyan T.A. Electronica i Svyaz. Vol. 1, No. 21, Kiev, 2007.-P. 89-92 (in Russian)

2007

Research of Application Capabilities of Software of Mixed-Mode Analysis for Simulating Sigma-Delta Modulators

With Chobanyan S.G., Matevosyan A.V. Electronica i Svyaz. No. 21, Vol. 1, Kiev, 2007.-P. 85-88 (in Russian)

2007

System Description Analysis During HW/SW Division Process

With Martirosyan A.H., Shahinyan T.H., Manucharyan D.V. Manual of Engineering Academy of Armenia. Vol. 4, No. 1, Yerevan, 2007.-P. 95-100 (in Armenian)

2006

HW/SW Partitioning Process Organization through Graph Representation of System Models in System-on Chip Design

With Martirosyan A.H., Davtyan D.F., Fanyan K.A. Manual of Engineering Academy of Armenia. Vol. 3, No. 2, Yerevan, 2006.-P. 289-292 (in Armenian)

2006

Simulation of Gate Current of CMOS Transistor at Reducing Geometrical Sizes

With Petrosyan T.A., Gharibyan G.G. Simulation, Optimization, Control. SEUA, Vol. 9, No. 1, Yerevan, 2006.-P. 66-74 (in Russian)

2006

Integrated Circuits – Reduction of Sizes, Increase of Capabilities, Complexity of Design

In the World of Science, No. 4, Yerevan, 2006.-P. 53-58 (in Armenian)

2006

Combinational Method of Calculating Parasitic Elements of Substrate of ICs

With Shahinyan T.H., Martirosyan A.A. Proceedings of the 2nd All-Union Scientific-Technical Conference "Problems of Developing Advanced Micro- and Nanoelectronic Systems-2006" (MES-2006), Moscow, 2006.-P. 72-75 (in Russian)

2006

Principles of Designing Systems of Logic Simulation with Consideration of Destabilizing Factors

Proceedings of the 2nd All-Union Scientific-Technical Conference "Problems of Developing Advanced Micro- and Nanoelectronic Systems-2006" (MES-2006), Moscow, 2006.-P. 15-21 (in Russian)

2006

Compensational Comprehensive Configuration of MOS Transistor

With Kocharyan A.Yu. Proceedings of the 7th International Scientific-Practical Conference “Contemporary Information and Electronic Technologies”, Odessa, 2006.-P. 144 (in Russian)

2006

Logic Simulation and Optimization of Digital Circuits with Consideration of Destabilizing Factors

Proceedings of the 7th International Scientific-Practical Conference “Contemporary Information and Electronic Technologies”, Odessa, 2006.-P. 48 (in Russian)

2006

Optimization of Critical Timing Paths of Digital ICs with Consideration of Destabilizing Factors

With Mkrtchyan K.G., Melikyan E.V., Petrosyan T.A., Manukyan G.G. Electronica i Svyaz. No. 9, Vol. 1, Kiev, 2006. -P. 47-51 (in Russian)

2006

Simulation Methodology Based on Conditional Extraction and Shortest Path Representation for Electrostatic Discharge (ESD) Analysis in CMOS Technologies

With Davtyan D.F., Fanyan K.A. RA National Academy of Science and SEUA, Vol. 59, No. 1, Yerevan, 2006. -P. 184-190 (in Armenian)

2005

Simulation and Optimization of Digital Circuits with Consideration of Destabilizing Factors

Dissertation for Doctor of Science degree, SEUA, Yerevan, 2005 (in Russian)

2004

A Digital Cell Macromodel Considering Radiation Effect

With Shahinyan T., Melikyan H. Manual of Engineering Academy of Armenia. Vol. 1. No. 3, Yerevan, 2004.-P. 585-588 (in Armenian)

2004

A Logic Simulation Method for Reproduction of Signal Bumps in Interconnects

Manual of Engineering Academy of Armenia. Vol. 1, No. 3, Yerevan, 2004.-P. 449-451 (in Russian)

2004

A Simulation Method of Considering Parasitic Effects of Supply Buses of ICs

With Sargsyan S. Information Technologies and Management. Vol. 1, Yerevan, 2004.-P. 34-48 (in Armenian)

2004

A Macromodel of Internal Interconnects of ICs

With Sargsyan S., Petrosyan D. RA National Academy of Science and SEUA, Vol. 57, No. 3, Yerevan, 2004.-P. 506-516 (in Armenian)

2004

Delay Minimization Algorithm of Critical Paths of Digital Circuits

With Hovhannisyan D.D. RA National Academy of Science and SEUA, Vol. 57, No. 2, Yerevan, 2004.-P. 324-330 (in Russian)

2004

Isolation Methods of Electronic Circuits

With Mkrtchyan E., Mkrtchyan K., Hovhannisyan D., Soghomonyan V. RA National Academy of Science and SEUA, Vol. 57, No. 1, Yerevan, 2004.-P. 130-137 (in Armenian)

2004

Calculation Model of Parasitic Inductions of Inner Interconnects of VLSI

With Sargsyan S.M., Petrosyan D.A. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 1, No. 7, 2004.-P. 59-68 (in Russian)

2003

Algorithm of Digital Circuits Restructuring

With Hovhannisyan D.D. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 6, No. 1, Yerevan, 2003.-P. 39-44 (in Armenian)

2003

Optimization Techniques for High-Performance Digital Circuits

With Hovhannisyan D.D. Proceedings of the 4th National Conference "Semiconductor Microelectronics", Tsakhkadzor, 2003.-P. 260-263 (in Armenian)

2003

The Simulation of Digital Circuits Taking into Account the Destabilizing Factors

Proceedings of the 4th National Conference "Semiconductor Microelectronics", Tsakhkadzor, 2003.-P. 240-243 (in Armenian)

2003

Restructuring Algorithm of Digital Circuits

With Hovhannisyan D.D. Simulation, Optimization, Control. SEUA, Yerevan, 2003. Vol. 4.-P. 159-166 (in Russian)

2003

Models of Digital Cells with Algorithmic Calculation of States

With Mkrtchyan E.O., Soghomonyan V.S. RA National Academy of Science and SEUA, Yerevan, 2003. No. 1.-P. 201-205 (in Russian)

2003

Logic Models with Averaged States

With Kulakhszyan A. RA National Academy of Science and SEUA, Yerevan, Vol. 56, No. 3, Yerevan, 2003.-P. 491-499 (in Armenian)

2003

Logic Models with Consideration of Leakage Delays, Quantum and Averaged States

With Kulakhszyan A. Information Technologies and Management. Vol. 3, Yerevan, 2003.-P. 8-15 (in Armenian)

2003

Model of Digital Cells’ States in Algorithmic Calculation

With Soghomonyan V., Mkrtchyan E. Inter-university scientific and methodical proceedings. 6. 51. Yerevan, 2003.-P. 44-54 (in Armenian)

2003

Logic Simulation of Digital Circuits Radiation Behavior

With Muradyan V.O. Proceedings of "Computer Science and Infor­mation Technologies" International Conference, Yerevan, 2003.-P. 368-372 (in Armenian)

2003

Optimization Algorithm of Digital Circuits

With Mkrtchyan K., Soghomonyan V., Kulakhszyan A. Semiconductor microelectronics. Proceedings of the 4th National Conference, Yerevan, 2003.-P. 220-224 (in Armenian)

2002

Quantum and Averaged State Models from the Viewpoint of Timing

With Kulakhszyan A., Soghomonyan V. Proceedings of the SEUA Annual Conference, Vol. 1, Yerevan, 2002.-P. 291-292 (in Armenian)

2001

Design of Control Systems by Flotation Process of Concentration

With Kyureghyan S.G., Mamikonyan B.M., Abgaryan S.V., Balasanyan S.Sh. Proceedings of “Computer Science and Information Technologies” International Conference, Yerevan, 2001.-P. 469-470 (in Russian)

2001

Simulation of Logic of Digital Cell for Consideration of Destabilizing Factors’ Effects

Proceedings of "Computer Science and Infor­mation Technologies" International Conference, Yerevan, 2001.-P. 394-398 (in Russian)

2001

Power Consumption Algorithm of Digital ICs

With Nazinyan S.M. Simulation, Optimization, Control. SEUA, Yerevan, Vol. 4, Yerevan, 2001.-P. 159-166 (in Armenian)

2000

Inertance Block of Models of Digital Element for Consideration of Destabilizing Factors

Electronica i Svyaz, No. 8, Vol. 2, Kiev, 2000.-P. 269-271 (in Russian)

2000

Logic Block of Digital Cell Model for Consideration of Destabilizing Factors

Electronica i Svyaz, No. 8, Vol. 2, Kiev, 2000.-P. 266-268 (in Russian)

1999

Key Design Tools of Logic Macromodels of Digital Circuits

With Balagezyan A.R. Proceedings of "Computer Science and Infor­mation Technologies" International Conference, Yerevan, 1999.-P. 394-398 (in Russian)

1999

Principles of Logic Simulation of Digital Circuits with Consideration of Destabilizing Factors

Proceedings of "Computer Science and Information Technologies" International Conference, Yerevan, 1999.-P. 389-393 (in Russian)

1999

Logic Element Model with Delay Dispersion

With Nazinyan S.M. Proceedings of the Annual Scientific Conference of SEUA, Yerevan, 1999.-P. 220 (in Russian)

1999

Logic Simulation of Digital Circuits Exposed to Radiation

Facta Universitatis Series Electronics and Energetics, Vol. 12, No. 1, Nis, 1999.-P. 1-16 (in English)

1999

Logic Model of Part of Digital Circuits with Consideration of Destabilization Factors

With Harutyunyan A.A., Vatyan A.O. Proceedings of the 5th International Conference on Experience of Designing and Application of CAD Systems in Microelect­ronics (CADSM’99), Lvov, 1999.-P. 145-146 (in Russian)

1999

Logic Simulation of Digital Circuits with Consideration of Destabilizing Factors

Proceedings of the 5th International Conference on Experience of Designing and Application of CAD Systems in Microelect­ronics (CADSM’99), Lvov, 1999.-P. 142-144 (in Russian)

1998

Logic Simulation Algorithm of Digital Circuits with Consideration of Environment Temperature

Proceedings of the 3rd International Scientific-Technical Conference “Innovative Information Technologies and Systems”, Penza, 1998.-P. 158-160 (in Russian)

1998

Symbol-Topological Simulation Method of Electronic Circuits

With Vatyan A.O., Grigoryan T.G., Abazyan M.A. Proceedings of the Annual Scientific Conference of SEUA, Yerevan, 1998.-P. 211-212 (in Russian)

1998

Logic Simulation of Digital VLSI with Consideration of Environment Temperature

With Soghomonyan B.S., Melikyan A.V., Petrosyan A.F. Proceedings of the Annual Scientific Conference of SEUA, Yerevan, 1998.-P. 211 (in Russian)

1998

Logic Macromodels of Typical Fragments of Digital Circuits

With Kulakhszyan A.P., Khzarjyan A.A., Kyureghyan A.P. Proceedings of the Annual Scientific Conference of SEUA, Yerevan, 1998.-P. 210 (in Russian)

1998

Adaptive Algorithm of 1D Optimization Methods

With Arakelyan A.A., Aghgashyan R.V., Barseghyan A.A. Proceedings of the Annual Scientific Conference of SEUA, Yerevan, 1998.-P. 208-209 (in Russian)

1998

Macromodel of Logic Gate-Chains

Simulation, Optimization, Control. SEUA, Yerevan, Vol. 2, Yerevan, 1998.- P. 52-57 (in Armenian)

1998

A Universal Program for Identification of Parameters of Electronic Components Models

Electronica i Svyaz, Vol. 4, No. 2, Kiev, 1998.-P. 245-248 (in Russian)

1998

Optimization of Timing Parameters of Digital Circuits Elements

Electronica i Svyaz, Vol. 4, No. 2, Kiev, 1998.-P. 249-253 (in Russian)

1998

Optimization of SPICE System LEVEL3 MOSFET Transistor Models Based on DC Measurements

With Mnatsakanian V.A., Uzunoglu N.K. Microelectronics Journal 29, Elsevier Science, Great Britain, 1998.-P. 151-156 (in English)

1997

Interconnections Model Delays for the Logic Analysis of I2L Circuits

With Vatyan A.O. SUAB, Vol. 3, Computer Engineering, Moscow, 1997.-P. 163-166 (in Russian)

1997

Cost Reduction of Digital Circuits by Means of Optimizing Element Delays

With Hakobyan S.M. SEUA, Armenian Scientific Research Institute of Informatics, 12 May 1997, No. 120, Yerevan, 1997 (in Russian)

1997

Simulation of Digital Circuits Based on the Theory of Fuzzy Logic

With Avakyan A.S. RA National Academy of Science and SEUA, Vol. 50, No. 2, Yerevan, 1997.-P. 126-130 (in Armenian)

1997

Interconnections Model Delays for the Logic Analysis of ECL Circuits

With Vatyan A.O. SUAB, Vol. 2, Computer Engineering, Moscow, 1997.-P. 187-194 (in Russian)

1997

Delay Models of Digital VLSI Interconnects

With Vatyan A.O., Simonyan A.Sh. RA National Academy of Science and SEUA, Vol. 3, No. 3, Yerevan, 1997.-P. 201-205 (in Armenian)

1997

Interconnections Model Delays for the Logic Analysis of TTL Circuits

With Vatyan A.O. SUAB, Vol. 1, Computer Engineering, Moscow, 1997.-P. 189-198 (in Russian)

1997

Structural Decomposition in Case of Mixed-Mode Simulation of VLSI

With Virabyan L.G., Oganes P.Sh. SEUA, Armenian Scientific Research Institute of Informatics, 10 Jun 1997, No. 141, Yerevan, 1997 (in Russian)

1997

Event-Trigger Decomposition in Case of Mixed-Mode Simulation of VLSI

With Virabyan L.G., Khoetkhem A.A. SEUA, Armenian Scientific Research Institute of Informatics, 10 Jun 1997, No. 140, Yerevan, 1997 (in Russian)

1997

A Software Complex of Parametrical Optimization of Models of Technical Objects

With Pivazyan T.G. SEUA, Armenian Scientific Research Institute of Informatics, 11 Apr 1997, No. 88, Yerevan, 1997 (in Russian)

1997

Logic Simulation of Digital Circuits on the Basis of Fuzzy Logic

With Avakyan A.S., Amirkhanyan K.G., Manucharyan D.V. SEUA, Armenian Scientific Research Institute of Informatics, 12 Nov 1996, No. 31, Yerevan, 1997 (in Russian)

1997

Consideration Algorithm of External Influence’s Affect on Digital Circuits Functioning

With Harutyunyan A.A. Proceedings of “Computer Science and Infor­mation Technologies” International Conference, Yerevan, 1997.-P. 330-333 (in Armenian)

1997

Optimization Algorithm of Digital Paths Delays

With Nazinyan S.M. Proceedings of “Computer Science and Information Technologies” International Conference, Yerevan, 1997.-P. 322-325 (in Armenian)

1996

Software of Portative, Universal, Intellectual, Pre-Programmable Electrocardiograph

With Muradyan M.A. Proceedings of the International Scientific-Technical Conference “Problems of Physical and Biomedical Electronics”, Kiev, 1996.-P. 73-74 (in Russian)

1996

Universal Adaptive System of Parametrical Identification of Models of Electronic Components

With Mnatsakanyan V.A., Ziad B.Kh. Proceedings of the International Scientific-Technical Conference “Problems of Physical and Biomedical Electronics”, Kiev, 1996.-P. 68-72 (in Russian)

1996

Computer Modeling of Fiber-Optic Communication Systems

With Bagdasaryan H.V., Nshanyan M.A., Uzunoglu N.K. Proceedings of the Trans Black Sea Region Symposium on Applied Electromagnetism, Epirus-Hellas, Athens, 1996.-P. OPSY 9 (in English)

1996

Structural and Eventual Decomposition of Large Electronic Schemes

Proceedings of the Trans Black Sea Region Symposium on Applied Electromagnetism, Epirus-Hellas, Athens, 1996-P. MMWS 7 (in English)

1996

An Elaboration of a Universal, PC Programmable, Portable Device with its Own Microcomputer for Analyzing Random Signals

With Muradyan M.A., Muradyan M.A., Dashtoyan R.V., Gasparyan E.G. Proceedings of the Trans Black Sea Region Symposium on Applied Electromag­netism, Epirus-Hellas, Athens, 1996.-P. BISY 12 (in English)

1996

A Simulation System of Radioelectronic Devices and Calculation of Model Parameters

With Soghomonyan S.Kh., Rahanyan R.R., Simonyan A.Sh. SEUA report 93-806, Yerevan, 1996.-P. 45 (in Armenian)

1996

Logic Model of Digital Cell for Small Signals

With Buakel Z.Kh. SEUA, Armenian Scientific Research Institute of Informatics, 20 Nov 1995, No. 6, Yerevan, 1996 (in Russian)

1995

VLSI Adaptive Simulation

With Mnatsakanian V., Ziad B., Hayrapetyan T. Proceedings of the 1st International Conference on Application of Critical Technologies for the Needs of Society, Yerevan, 1995.-P. 135 (in Russian)

1990

Consideration of External Effects in the Program of Logic Analysis

With Simonyan A.Sh. Inter-university proceedings of YPI “Technical Means and Mathematical Provision of Computing Systems”, Yerevan, 1990.-P. 61-64 (in Russian)

1989

A Language for Describing Digital Circuits

Proceedings of Moscow Aviation Institute, Moscow, 1989.-P. 17-20 (in Russian)

1989

United System of Logic Simulation and Layout Design of VLSI

With Ovasapyan N.O., Petrukhin V.P. Automation design in electronics, “Technics”, Vol. 40, Kiev, 1989.-P. 61-64 (in Russian)

1988

Definition of Noise Immunity of Digital VLSI

With Hovasapyan N.O., Manukyan G.G. Inter-university proceedings of YPI “Technical Means and Mathematical Provision of Computing Systems”, Yerevan, 1988.-P. 60-62 (in Russian)

1988

Development of VLSI Logic Simulation Program with Consideration of External Effects

With Demirkhanyan A.M., Avetikova E.G. YPI report, No. 01880047948, Yerevan, 1988.-P. 46 (in Russian)

1988

Development of a Program of Logic Simulation for Consideration of Parasitic Effects of Topological Realization of VLSI

With Demirkhanyan A.M., Avetikova E.G., Manukyan G.G. YPI report, No. 01880047950, Yerevan, 1988.-P. 57 (in Russian)

1987

Modification of Program of Logic Simulation and Union of Phases of Logic, Circuit, and Layout Design on Database

With Demirkhanyan A.M., Avetikova E.G., Manukyan G.G. YPI report, No. 01860055887, Yerevan, 1987.-P. 85 (in Russian)

1986

Macromodels on Switched Capacitors Elements

With Arkhangelskiy A.Y. Radioelectronics, Vol. 29, No. 6, 1986.-P. 86-87 (in Russian)

1985

A Program for Mixed-Mode Analysis of Analog-Digital Circuits

With Arkhangelskiy A.Y. Proceedings of MIFI “Electrical Engineering and Devices for Experimental Physics”, Moscow, 1985.-P. 134-138 (in Russian)

1985

Development of Specialized Control-Measuring System for Control and Screening a Series of Resistor Variables on the Basis of Microcomputers

With Avetikova E.G. YPI report, No. 01850022861, Yerevan, 1985 (in Russian)

1984

Mixed-Mode Circuit and Logic Simulation of Analog Digital Circuits

With Arkhangelskiy A.Y. Electronic Simulation, Vol. 6, No. 5, Kiev, Ukraine, 1984.-P. 35-39 (in Russian)

1984

Dialogue Teaching System

With Janpoladyan B.L. Inter-university proceedings on automation, computer engineering, and electronics “Transmission and Information Processing”, Yerevan, YPI pub.,­ 1984.-P. 9-12 (in Russian)

1984

Mixed-Mode Simulation of Analog-Digital VLSI

Dissertation for PhD degree, MIFI, Moscow, 1984.-P. 233 (in Russian)

1984

Principles of Designing a System of Mixed-Mode Simulation of Electronic Circuits

With Arkhangelskiy A.Y., Levshin N.G. Seminar materials on “Design Automation in Radioelectronics and Electrical Engineering”, Moscow, 1984.-P. 91-93 (in Russian)

1984

Description of Discrete Systems on ELAIS-L Language

Theses of reports of the 4th All-Union Seminar “Simulation of Discrete Control and Calculating Systems”, Sverdlovsk, 1984.-P. 64-66 (in Russian)

1983

Logic-Circuit Simulation of Analog-Digital Nodes of Radio Metering Devices

Proceedings of the 9th All-Union Scientific-Technical Conference on “Radio Metering”, Kaunas, 1983.-P. 177-180 (in Russian)

1983

A Program of Mixed-Mode Simulation of Analog-Digital VLSI

With Arkhangelskiy A.Y. Lavrenov O.E., Rojukalns P.P., Svettsov S.V., Fedorkov B.G. Theses of reports of the All-Union Conference on “Methods and Microelectronic Means of Digital Conversion and Signal Processing”, Riga, 1983.-P. 231-236 (in Russian)

1983

Functionality Models of Logic Cells in the Program of Mixed-Mode Logic-Circuit Simulation

With Arkhangelskiy A.Y. Theses of reports of the All-Union Scientific-Technical Conference on “Design Automation of Computers and Systems”, Yerevan, 1983.-P. 80-82 (in Russian)

1983

Development of High-Speed Operational Amplifiers, Development of Mathematical and Software Provision of CAD of Analog-Digital Microassembly

With Arkhangelskiy A.Y., Volkov Yu.A., Abramov V.F., Mishin A.A., Levshin N.G. Report of MIFI, No. 01824021405, Moscow, 1983.-P. 287 (in Russian)

1983

Software Development of Simulating Analog-Digital Converters of Information

With Arkhangelskiy A.Y., Arkhangelskaya I.T., Levshin N.G., Sergienko B.Yu. Report of MIFI, No. 01824034446, Moscow, 1983.-P. 196 (in Russian)

1982

Basic Educational CAD of University

With Arkhangelskiy A.Y., Karmazinskiy A.N., Petrov G.V. Report of MIFI, No. 01822000176, Moscow, 1982.-P. 105 (in Russian)

1981

Creation and Introduction to Exploitation on the Basis of Information Computer Center

With Abramyan K.G., Janpoladyan B.L., Abramyan A.K. Latvian Republic Organization of Civil Aviation, “Calculation and Accounting”// YPI Report, No. 81041906, Yerevan, 1981.-P. 105 (in Russian)

1981

Creation and Introduction to Exploitation on the Basis of Information Computer Center

With Abramyan K.G., Janpoladyan B.L., Abramyan A.K. Latvian Republic Organization of Civil Aviation, “Calculation and Accounting”// YPI Report, No. 81041905, Yerevan, 1981.-P. 77 (in Russian)